CVE-2020-15567 in Xen
Summary
by MITRE
An issue was discovered in Xen through 4.13.x, allowing Intel guest OS users to gain privileges or cause a denial of service because of non-atomic modification of a live EPT PTE. When mapping guest EPT (nested paging) tables, Xen would in some circumstances use a series of non-atomic bitfield writes. Depending on the compiler version and optimisation flags, Xen might expose a dangerous partially written PTE to the hardware, which an attacker might be able to race to exploit. A guest administrator or perhaps even an unprivileged guest user might be able to cause denial of service, data corruption, or privilege escalation. Only systems using Intel CPUs are vulnerable. Systems using AMD CPUs, and Arm systems, are not vulnerable. Only systems using nested paging (hap, aka nested paging, aka in this case Intel EPT) are vulnerable. Only HVM and PVH guests can exploit the vulnerability. The presence and scope of the vulnerability depends on the precise optimisations performed by the compiler used to build Xen. If the compiler generates (a) a single 64-bit write, or (b) a series of read-modify-write operations in the same order as the source code, the hypervisor is not vulnerable. For example, in one test build using GCC 8.3 with normal settings, the compiler generated multiple (unlocked) read-modify-write operations in source-code order, which did not constitute a vulnerability. We have not been able to survey compilers; consequently we cannot say which compiler(s) might produce vulnerable code (with which code-generation options). The source code clearly violates the C rules, and thus should be considered vulnerable.
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Analysis
by VulDB Data Team • 07/08/2020
This vulnerability exists in Xen hypervisor versions through 4.13.x and represents a critical security flaw affecting Intel-based systems that utilize nested paging through Extended Page Tables. The issue stems from non-atomic modifications of live EPT Page Table Entries during the mapping process of guest EPT tables. When Xen processes these mappings, it sometimes employs a sequence of non-atomic bitfield writes that can result in partially written PTEs being exposed to hardware. This condition creates a race window that malicious actors can potentially exploit to achieve privilege escalation or denial of service attacks. The vulnerability specifically impacts systems using Intel CPUs with nested paging enabled, making it distinct from other hypervisor flaws that might affect AMD or ARM architectures. According to the Common Weakness Enumeration framework, this vulnerability aligns with CWE-119, which addresses weaknesses in memory access patterns, and CWE-362, which covers race conditions that can lead to security flaws. The attack surface is further constrained by the requirement that only HVM and PVH guests can exploit this vulnerability, limiting the scope to certain virtual machine configurations.
The operational impact of CVE-2020-15567 extends beyond simple denial of service to potentially enable privilege escalation attacks that could compromise the entire virtualized environment. An attacker with access to a guest administrator account or even an unprivileged user might be able to manipulate the timing of memory operations to exploit the race condition inherent in the non-atomic PTE modifications. This vulnerability operates at the intersection of hypervisor security and hardware virtualization, where the attacker can potentially corrupt memory mappings or gain elevated privileges within the guest operating system, which could then be leveraged to compromise other guests or the host system itself. The specific nature of the flaw means that it's not a direct hardware vulnerability but rather a software implementation issue that manifests through the hypervisor's handling of memory management operations. The timing of the attack is critical since it requires the attacker to carefully orchestrate the race condition to exploit the partially written PTEs, making this a sophisticated attack vector that requires specific conditions to be met.
The technical implementation of this vulnerability demonstrates a fundamental flaw in how the hypervisor manages memory translation tables under Intel's EPT mechanism. When the compiler generates code that performs multiple separate bitfield operations instead of a single atomic 64-bit write, the hypervisor exposes a window where hardware can observe an inconsistent state of the PTE. This inconsistency occurs because the compiler's optimization decisions can result in read-modify-write sequences that are not atomic from the hardware perspective. The vulnerability is particularly concerning because it can be triggered by normal guest operations rather than requiring special attack conditions, and the compiler-dependent nature means that different build configurations might exhibit different levels of susceptibility. From an ATT&CK framework perspective, this vulnerability maps to privilege escalation techniques (T1068) and defense evasion (T1059) where an attacker can manipulate hypervisor memory structures to gain elevated privileges. The fact that this issue was discovered in source code that clearly violates C language rules indicates poor coding practices that should have been caught during development review processes. Systems using GCC with certain optimization flags, particularly those that generate multiple unlocked read-modify-write operations, are vulnerable, while builds that use single 64-bit writes or consistent read-modify-write sequences in source order are not affected.
Mitigation strategies for CVE-2020-15567 require immediate action from system administrators to patch affected Xen installations to versions that address the atomicity issue in EPT PTE handling. The most effective approach is to update to Xen versions that have implemented proper atomic operations when modifying EPT tables, ensuring that the compiler cannot generate the problematic read-modify-write sequences that create the race condition. Organizations should also consider implementing additional monitoring and detection mechanisms to identify potential exploitation attempts, particularly in environments where guest users have administrative privileges. The vulnerability's compiler-dependent nature means that system administrators should review their build environments and compiler optimization settings to ensure that the generated code does not create the vulnerable race conditions. Security teams should also consider implementing hypervisor-level protections such as memory access controls and monitoring for unusual PTE modification patterns. Given that this vulnerability affects the core memory management functionality of the hypervisor, it's crucial to maintain updated security patches and conduct regular security assessments of virtualization environments to prevent exploitation attempts. The remediation process should include not only patching the hypervisor but also verifying that all guest operating systems are properly updated and that appropriate access controls are implemented to limit potential attack vectors.