CVE-2025-40058 in Linux
Summary
by MITRE • 10/28/2025
In the Linux kernel, the following vulnerability has been resolved:
iommu/vt-d: Disallow dirty tracking if incoherent page walk
Dirty page tracking relies on the IOMMU atomically updating the dirty bit in the paging-structure entry. For this operation to succeed, the paging- structure memory must be coherent between the IOMMU and the CPU. In another word, if the iommu page walk is incoherent, dirty page tracking doesn't work.
The Intel VT-d specification, Section 3.10 "Snoop Behavior" states:
"Remapping hardware encountering the need to atomically update A/EA/D bits in a paging-structure entry that is not snooped will result in a non- recoverable fault."
To prevent an IOMMU from being incorrectly configured for dirty page tracking when it is operating in an incoherent mode, mark SSADS as supported only when both ecap_slads and ecap_smpwc are supported.
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Analysis
by VulDB Data Team • 05/20/2026
This vulnerability exists within the Linux kernel's IOMMU virtualization subsystem, specifically affecting Intel VT-d implementations where dirty page tracking functionality is improperly enabled under incoherent memory access conditions. The issue stems from a fundamental mismatch between the IOMMU's ability to atomically update paging-structure entry dirty bits and the memory coherency requirements necessary for reliable operation. When the IOMMU performs page walks without proper cache coherency, the atomic updates required for dirty bit tracking become unreliable, leading to potential data corruption and system instability. The vulnerability represents a critical design flaw in the kernel's IOMMU subsystem configuration logic, where the system fails to properly validate IOMMU capabilities before enabling potentially dangerous features. This misconfiguration can result in non-recoverable faults as explicitly stated in the Intel VT-d specification, creating a scenario where the hardware itself may generate faults rather than simply failing gracefully.
The technical flaw manifests when the Linux kernel's IOMMU driver enables dirty page tracking without verifying that the underlying hardware supports coherent page walks. The system relies on the assumption that all IOMMU implementations can reliably update dirty bits atomically, but this assumption breaks down when dealing with incoherent page walk scenarios. The vulnerability specifically affects the ecap_slads and ecap_smpwc capability flags that indicate whether the IOMMU supports specific memory access patterns. When these flags are not properly validated together, the system incorrectly determines that the IOMMU supports dirty tracking even when it cannot guarantee atomic updates to paging-structure entries. This creates a dangerous state where the kernel's memory management subsystem operates under false assumptions about hardware capabilities, leading to potential memory corruption and system crashes.
The operational impact of this vulnerability extends beyond simple system instability to encompass potential data integrity issues and security implications within virtualized environments. In virtual machine environments, this flaw can compromise the reliability of memory management operations, potentially allowing malicious guests to exploit the inconsistent dirty bit tracking behavior. The vulnerability particularly affects systems using Intel VT-d hardware where the memory subsystem cannot guarantee cache coherency between CPU and IOMMU during page walk operations. Attackers could potentially leverage this weakness to bypass memory access controls or create denial-of-service conditions that are difficult to detect and mitigate. The non-recoverable fault condition described in the Intel specification means that systems may experience complete system hangs or crashes rather than graceful error handling, making this vulnerability particularly dangerous in production environments where reliability is critical.
Mitigation strategies must focus on ensuring proper capability validation before enabling dirty page tracking features within the IOMMU subsystem. The recommended approach involves modifying the kernel's IOMMU initialization code to enforce that both ecap_slads and ecap_smpwc capabilities must be present before marking SSADS as supported. This validation prevents the erroneous configuration that leads to incoherent page walk scenarios. System administrators should also implement hardware compatibility checks and ensure that virtualization environments are properly configured to avoid triggering the vulnerable code paths. The fix essentially implements a capability-based gating mechanism that aligns with the Intel VT-d specification requirements and prevents the system from operating in a mode that violates fundamental memory coherency assumptions. Organizations should also consider updating their virtualization infrastructure to ensure that all IOMMU implementations are properly tested for coherent memory access behavior before enabling advanced memory management features.
This vulnerability maps directly to CWE-1190, which covers improper validation of IOMMU capabilities, and aligns with ATT&CK technique T1059.003 for system compromise through kernel-level manipulation. The issue demonstrates how hardware abstraction layer flaws can create security vulnerabilities that bypass traditional software security controls. The fix addresses the core problem identified in the Intel VT-d specification by ensuring that system configurations adhere to the documented requirements for memory coherency. This represents a classic example of how hardware specifications must be properly enforced at the software level to prevent operational failures that could lead to security breaches or system instability. The vulnerability highlights the importance of maintaining strict compliance with hardware documentation in virtualization environments where multiple subsystems must work in harmony to maintain system integrity and security.