CVE-2026-46255 in Linux
Summary
by MITRE • 06/03/2026
In the Linux kernel, the following vulnerability has been resolved:
dmaengine: fsl-edma: don't explicitly disable clocks in .remove()
The clocks in fsl_edma_engine::muxclk are allocated and enabled with devm_clk_get_enabled(), which automatically cleans these resources up, but these clocks are also manually disabled in fsl_edma_remove(). This causes warnings on driver removal for each clock:
edma_module already disabled WARNING: CPU: 0 PID: 418 at drivers/clk/clk.c:1200 clk_core_disable+0x198/0x1c8 [...]
Call trace: clk_core_disable+0x198/0x1c8 (P) clk_disable+0x34/0x58 fsl_edma_remove+0x74/0xe8 [fsl_edma]
[...]
---[ end trace 0000000000000000 ]---
edma_module already unprepared WARNING: CPU: 0 PID: 418 at drivers/clk/clk.c:1059 clk_core_unprepare+0x1f8/0x220 [...]
Call trace: clk_core_unprepare+0x1f8/0x220 (P) clk_unprepare+0x34/0x58 fsl_edma_remove+0x7c/0xe8 [fsl_edma]
[...]
---[ end trace 0000000000000000 ]---
Fix these warnings by removing the unnecessary fsl_disable_clocks() call in fsl_edma_remove().
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Analysis
by VulDB Data Team • 06/04/2026
The vulnerability described involves a double-free or double-disable condition in the Freescale Enhanced Direct Memory Access engine driver within the Linux kernel. This issue manifests as warnings during driver removal operations when the fsl_edma driver attempts to manually disable clocks that have already been automatically managed by the device management framework. The root cause lies in the improper handling of clock resources where the driver uses devm_clk_get_enabled() to allocate and enable clocks, which automatically manages their lifecycle, but then redundantly calls fsl_disable_clocks() in the remove function, leading to resource management conflicts.
The technical flaw stems from a fundamental misunderstanding of how device management frameworks operate within the Linux kernel. When devm_clk_get_enabled() is called, it registers the clock with the device management subsystem, which automatically handles the cleanup process during device removal. However, the fsl_edma_remove() function explicitly calls fsl_disable_clocks() which attempts to disable clocks that are already in the process of being cleaned up by the device management framework. This creates a race condition and resource management conflict where the kernel's clock subsystem receives multiple disable/unprepare operations for the same clock resources.
This vulnerability impacts system stability and generates misleading error messages that can obscure legitimate issues during driver lifecycle management. The warnings indicate that clocks are already disabled or unprepared when the driver attempts to operate on them, which violates the expected behavior of the clock subsystem. From an operational perspective, while this may not cause immediate system crashes or data corruption, it does generate log noise that can complicate debugging and monitoring efforts. The issue affects systems using Freescale EDMA engines, particularly those with DMA capabilities, and could potentially mask other genuine clock management problems in complex embedded systems.
The fix implemented removes the redundant fsl_disable_clocks() call from the fsl_edma_remove() function, allowing the device management framework to properly handle clock cleanup. This aligns with the principle of least privilege and proper resource management, ensuring that kernel subsystems do not interfere with automatic cleanup mechanisms. The solution addresses the core issue identified in CWE-459, which relates to incomplete cleanup of resources, and follows the ATT&CK framework's concept of privilege escalation through improper resource handling. By eliminating the manual clock management in the remove function, the driver now properly cooperates with the kernel's device management subsystem, reducing system overhead and eliminating the warning messages that were obscuring legitimate system diagnostics. This remediation ensures that clock resources are properly managed according to the kernel's device management conventions and maintains the integrity of the clock subsystem's state management during driver lifecycle operations.