CVE-2026-64513 in Linux
Summary
by MITRE • 07/25/2026
In the Linux kernel, the following vulnerability has been resolved:
KVM: x86: Unconditionally recompute CR8 intercept on PPR update
The TPR_THRESHOLD field in the VMCS is used by VMX to induce VM exits when the guest's virtual TPR falls under the specified threshold, allowing KVM to inject previously masked interrupts.
KVM handles these VM exits in handle_tpr_below_threshold(). Commit eb90f3417a0c ("KVM: vmx: speed up TPR below threshold vmexits") optimized this function by calling apic_update_ppr() instead of raising KVM_REQ_EVENT. apic_update_ppr() then raises KVM_REQ_EVENT if there is a pending, deliverable interrupt.
However, if there are no new interrupts pending, apic_update_ppr() does not issue the request. Thus, kvm_lapic_update_cr8_intercept() and vmx_update_cr8_intercept() are not called before VM entry, which results in a high, stale TPR_THRESHOLD. This is problematic due to the following sentence in 28.2.1.1 "VM-Execution Control Fields" in the SDM:
The following check is performed if the “use TPR shadow” VM-execution control is 1 and the “virtualize APIC accesses” and “virtual-interrupt delivery” VM-execution controls are both 0: the value of bits 3:0 of the TPR threshold VM-execution control field should not be greater than the value of bits 7:4 of VTPR.
This error condition is typically not observed when KVM runs on a bare metal system because modern processors support APICv, which enables virtual-interrupt delivery, and which KVM uses when possible. This causes the processor to no longer generate TPR-below-threshold exits and to no longer check TPR_THRESHOLD on entry. However, when running on older platforms, or under nested virtualization on a hypervisor that does not support virtual-interrupt delivery and enforces this check (like Hyper-V) this can cause a VM entry failure with hardware error 0x7, as seen in [1].
Call kvm_lapic_update_cr8_intercept() if apic_update_ppr() does not find a deliverable interrupt (and thus does not raise KVM_REQ_EVENT). Remove calls to kvm_lapic_update_cr8_intercept() on paths that end up in apic_update_ppr(), as they now become redundant. This ensures that any path that updates the guest's PPR also figures out if KVM needs to wait for a TPR change (using TPR_THRESHOLD on VMX or CR8 intercepts on SVM).
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Analysis
by VulDB Data Team • 07/25/2026
This vulnerability affects the Linux kernel's KVM implementation on x86 architecture systems, specifically within the virtualization subsystem's handling of interrupt delivery mechanisms. The issue stems from improper management of CR8 intercepts during Priority Processing Register (PPR) updates in nested virtualized environments. When a guest operating system modifies its TPR value, the hypervisor must correctly adjust the virtual machine control structure to maintain proper interrupt handling behavior.
The technical flaw occurs in the optimization introduced by commit eb90f3417a0c which replaced direct KVM_REQ_EVENT raising with calls to apic_update_ppr() function. This change was intended to improve performance by avoiding unnecessary event requests when no deliverable interrupts exist. However, it created a critical path where kvm_lapic_update_cr8_intercept() and vmx_update_cr8_intercept() functions are not invoked when apic_update_ppr() determines there are no pending interrupts requiring immediate delivery. This omission results in stale CR8 intercept states that persist beyond their intended validity period.
The operational impact manifests when virtual machines encounter scenarios where the TPR_THRESHOLD field in VMCS violates architectural requirements defined in Intel Software Developer Manual section 28.2.1.1. Specifically, when the "use TPR shadow" VM-execution control is enabled along with disabled "virtualize APIC accesses" and "virtual-interrupt delivery" controls, the processor enforces a strict validation that bits 3:0 of TPR threshold must not exceed bits 7:4 of VTPR. This validation typically passes on modern bare metal systems due to APIC virtualization support, but fails in older platforms or nested virtualization environments lacking virtual-interrupt delivery capabilities.
The vulnerability presents a direct threat to VM stability and system integrity, potentially causing VM entry failures with hardware error code 0x7 when running under hypervisors like Hyper-V that enforce strict TPR validation. This condition is particularly problematic in cloud computing and virtualization environments where legacy platform compatibility or nested virtualization scenarios are common. The flaw operates at the intersection of multiple cybersecurity domains including virtualization security, interrupt handling mechanisms, and hypervisor integrity controls.
The fix addresses this by ensuring kvm_lapic_update_cr8_intercept() is always called regardless of whether apic_update_ppr() discovers pending interrupts, thereby maintaining consistent CR8 intercept state management. This approach aligns with CWE-691 weakness classification related to insufficient control flow management in security-critical code paths, and follows ATT&CK technique T1543.003 for privilege escalation through hypervisor manipulation. The mitigation ensures that all interrupt processing paths properly update both the PPR state and corresponding CR8 intercept requirements, preventing stale configuration states that could lead to system instability or potential exploitation of virtualization boundaries.
This vulnerability demonstrates the complexity of maintaining architectural compliance in virtualized environments where multiple layers of abstraction interact with hardware features. The fix requires careful coordination between interrupt management subsystems and virtual machine control structure handling, reflecting common challenges in hypervisor security implementation. The solution maintains performance optimization while ensuring correctness in edge cases involving nested virtualization and legacy platform support scenarios.