CVE-2026-89731 in Linux
Summary
by MITRE • 09/11/2026
In the Linux kernel, the following vulnerability has been resolved:
cxl/ras: Fix cxl_rch_get_aer_info() out-of-bounds AER register read
cxl_rch_get_aer_info() copies the RCH Downstream Port AER capability from the RCRB MMIO block using a readl() loop bounded by sizeof(struct aer_capability_regs). This struct is a software layout and its embedded struct pcie_tlp_log is larger than the on-wire AER capability. As a result the loop reads past the mapped AER register block.
The over-read also populates the software-only tail fields including header_log.header_len. An out-of-range header_len passed to pcie_print_tlp_log() can then loop past the header log buffer and cause a second out-of-bounds read.
The read was correct when introduced, but struct pcie_tlp_log has since grown (Header Log and TLP Prefix Log sizes, header_len and flit fields), so sizeof(struct aer_capability_regs) no longer matches the physical AER capability.
Bound the read to the physical AER registers, header through the 16 byte Header Log. Zero the destination first so the software-only fields are deterministic.
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Analysis
by VulDB Data Team • 09/11/2026
The Linux kernel vulnerability identified in the cxl/ras subsystem involves an out-of-bounds memory read within the function cxl_rch_get_aer_info(). This flaw stems from a mismatch between the size of a software-defined data structure and the actual physical hardware registers it attempts to access. Specifically, the function copies Advanced Error Reporting capability information from the Root Complex Register Block using a loop bounded by sizeof(struct aer_capability_regs). While this approach was initially correct when the code was introduced, subsequent updates to the kernel expanded struct pcie_tlp_log to include additional fields such as Header Log and TLP Prefix Log sizes, along with header_len and flit fields. Consequently, the size of the software structure now exceeds the actual on-wire AER capability defined by the hardware specification. This discrepancy causes the readl() loop to access memory locations beyond the mapped MMIO region for the RCH Downstream Port AER registers.
The operational impact of this vulnerability extends beyond a simple out-of-bounds read, as it triggers a secondary security issue within the same execution path. The erroneous over-read populates software-only tail fields in the data structure, most critically header_len. This field is subsequently passed to pcie_print_tlp_log(), which uses its value to determine how much of the header log buffer to process. Because header_len contains garbage or out-of-range values derived from the invalid memory access, pcie_print_tlp_log() may loop past the bounds of the allocated header log buffer. This results in a second out-of-bounds read, potentially exposing sensitive kernel memory contents or causing system instability depending on what data resides at those unauthorized addresses. Such behavior aligns with CWE-125, Out-of-bounds Read, and can be categorized under ATT&CK technique T1083, File and Directory Discovery, if the leaked information is used for further reconnaissance within a compromised environment.
The root cause of this issue lies in the assumption that the software representation of hardware capabilities remains static relative to physical register layouts. In complex subsystems like CXL (Compute Express Link), kernel structures often evolve independently of hardware specifications to support new features or debugging capabilities. When these structures grow without corresponding adjustments to access boundaries, developers inadvertently create windows for memory corruption and information disclosure. The vulnerability highlights the critical need for strict separation between software-internal data layouts and physical hardware register sizes during MMIO operations. It also underscores the risks associated with trusting size fields derived from potentially corrupted or uninitialized memory regions.
To mitigate this vulnerability, the fix involves explicitly bounding the read operation to match only the valid physical AER registers rather than relying on the sizeof operator for a struct that includes software-only extensions. The implementation ensures that reads are limited to the 16-byte Header Log portion of the capability block, which is guaranteed to exist in hardware. Furthermore, the destination buffer is zeroed out before population begins. This step guarantees that any fields not explicitly written by the valid register read remain deterministic and null rather than containing residual data from adjacent memory locations. This approach prevents both the initial over-read and the subsequent secondary overflow caused by invalid header_len values. System administrators should apply kernel updates that include this patch to prevent potential information leakage or denial of service conditions arising from malformed AER capability parsing in CXL-enabled systems.